HAL.c

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#include "derivative.h"
#include "Compile_Options.h"
#include "ADC.h"
#include "CRC.h"
#include "DSPI.h"
#include "EDMA.h"
#include "FCU.h"
#include "LIN_UART.h"
#include "ME.h"
#include "PIT.h"
#include "SIU.h"
#include "SWT.h"
#include "HAL.h"
#include "CGM.h"
#include "CG147.h"
#include "IntcInterrupts.h"     /* Implement functions from this file */
#include "Exceptions.h"
#include "Maildelivery.h" /* For postal service */
#include "MailScheduler.h"    /* For postal service `scheduler */
#ifdef USE_FREEMASTER
#include "Freemaster.h"
#endif
/*
 ******************************************************************************
 * constants
 ******************************************************************************
 */
static const SWTConfig_t tWatchDogConfig =
{
  SWT_WINDOW_COUNTS(0x0000F000u), SWT_TIME_OUT_COUNTS(0x10000001u),
  (uint32_t)(SWT_DIS | SWT_DEBUG_DIS | SWT_STOP_DIS)
//(uint32_t)(SWT_EN | SWT_DEBUG_EN | SWT_STOP_DIS | SWT_SOFT_LOCK_EN | \
  // SWT_HARD_LOCK_DIS | SWT_WINDOWED_MODE_DIS | SWT_RESET_WHEN_INVALID | \
  // SWT_RANDOM_KEY_DIS | SWT_USES_OSCILLATOR)
    };

static const uint16_t
    au16PeripheralConfig[] =
    {
      /* Peripheric                      RUN Mode         Low-Power */
      /* Config for DSPI0 */
      ((ME_DSPI0 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_ON
          | DEBUG_FREEZE_ON),
      /* Config for DSPI1 */
      ((ME_DSPI1 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for DSPI2 */
      ((ME_DSPI2 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for DSPI3 */
      ((ME_DSPI3 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for CAN0 */
      ((ME_FLEXCAN0 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for FLEXRAY0 */
      ((ME_FLEXRAY0 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for Safety Port */
      ((ME_SAFETYPORT << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for ADC0 */
      ((ME_ADC0 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for ADC1 */
      ((ME_ADC1 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for CTU0 */
      ((ME_CTU0 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for ETIMER0 */
      ((ME_ETIMER0 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for ETIMER1 */
      ((ME_ETIMER1 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for PWM0 */
      ((ME_PWM0 << BITS_IN_BYTE) | RUN_ALWAYS_OFF | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for SCI0 */
      ((ME_LINFLEX0 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_ON
          | DEBUG_FREEZE_OFF),
      /* Config for SCI1 */
      ((ME_LINFLEX1 << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF),
      /* Config for PIT */
      ((ME_PIT << BITS_IN_BYTE) | RUN_ALWAYS_ON | LP_ALWAYS_OFF
          | DEBUG_FREEZE_OFF) };

static const ISRConfig_t tISRConfig[] =
{
  /* ISR                    Vector                 Priority         */
  {
    vfnDSPI0EOQIsr, DSPI0_EOQF_INT, ISR_MED_PRIORITY },
  {
    vfnDSPI0RFDFIsr, DSPI0_RFDF_INT, ISR_LOW_PRIORITY },
  {
    vfnDSPI0TCFIsr, DSPI0_TCF_INT, ISR_VL_PRIORITY },
  {
    vfnDSPI0TFFFIsr, DSPI0_TFFF_INT, ISR_VL_PRIORITY },
  {
    vfnDSPI1RFDFIsr, DSPI1_RFDF_INT, ISR_LOW_PRIORITY },
  {
    vfnDSPI1TCFIsr, DSPI1_TCF_INT, ISR_VL_PRIORITY },
  {
    vfnDSPI1TFFFIsr, DSPI1_TFFF_INT, ISR_VL_PRIORITY },
//  {
//    vfnADC0EoCIsr, ADC0_EOC_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC0EoCIsr, ADC0_EOC_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC0ErrIsr, ADC0_ER_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC0WatchDogIsr, ADC0_WD_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC1EoCIsr, ADC1_EOC_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC1ErrIsr, ADC1_ER_INT, ISR_UL_PRIORITY },
//  {
//    vfnADC1WatchDogIsr, ADC1_WD_INT, ISR_UL_PRIORITY },
  {
    vfnSchedIsr, PIT_CH0_INT, ISR_VH_PRIORITY },
  {
    vfnCG147WD2Isr, SOFT_CONFIG_FLAG_4, ISR_MED_LO_PRIORITY },  
  {
    vfnReschedulerIsr, PIT_CH1_INT, ISR_HI_PRIORITY },
  {
    vfnReScheduleWD, SOFT_CONFIG_FLAG_6, ISR_MED_PRIORITY },
  {
    vfnReScheduleWD3, SOFT_CONFIG_FLAG_7, ISR_LOW_PRIORITY },
  {
    vfnSchedInboxDoneIsr, DMA_12_INT, ISR_UH_PRIORITY },
  {
    vfnSchedInboxDoneIsr, DMA_13_INT, ISR_UH_PRIORITY },
  {
    vfnCRC0Isr, DMA_10_INT, ISR_MED_PRIORITY },
  {
    vfnCRC1Isr, DMA_11_INT, ISR_MED_PRIORITY },
  
#ifdef USE_FREEMASTER
  {
    FMSTR_Isr, LIN0_RXI_INT, ISR_MIN_PRIORITY },
  {
    FMSTR_Isr, LIN0_TXI_INT, ISR_MIN_PRIORITY },
  {
    FMSTR_Isr, LIN1_RXI_INT, ISR_MIN_PRIORITY },
  {
    FMSTR_Isr, LIN1_TXI_INT, ISR_MIN_PRIORITY },
#else
    {
      vfnLIN0RxIsr, LIN0_RXI_INT, ISR_UL_PRIORITY},
    {
      vfnLIN0TxIsr, LIN0_TXI_INT, ISR_MIN_PRIORITY},
    {
      vfnLIN1RxIsr, LIN1_RXI_INT, ISR_UL_PRIORITY},
    {
      vfnLIN1TxIsr, LIN1_TXI_INT, ISR_MIN_PRIORITY}
#endif
    };
static const uint16_t cau16DefaultPinConfig[PIN_CONFIG_REGISTER_MAX] =
{
#ifdef USE_ARD2_V1
  PIN_ALT3_CONFIG, PIN_DISABLED, PIN_GPO_DEFAULT_CONFIG, /* 0  -  2: FCU0,-,EN_FL for the time being */
  PIN_PROGRAM, PIN_PROGRAM, PIN_GPIO_DEFAULT_CONFIG, /* 3  -  5: -,-,CG_N_SYNC */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 6  -  8: -,DIS_AHP,DIS_ALP */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 9  - 11 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 12 - 14 */
  PIN_GPO_DEFAULT_CONFIG, PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, /* 15 - 17: CG_N_SYS_RES,DEBUG,- */
  PIN_ALT1_CONFIG, (PIN_GPI_DEFAULT_CONFIG), PIN_ALT1_CONFIG, /* 18 - 20: LIN0, LIN0, TDO */
  0x0107, PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 21 - 23: TDI, CLKOUT, LIN0 */
  PIN_DISABLED, PIN_DISABLED, PIN_ANALOG_CONFIG, /* 24 - 26: -,-, CG147's AOUT */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 27 - 29 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 30 - 32 */
  PIN_DISABLED, PIN_DISABLED, PIN_ALT3_CONFIG, /* 33 - 35: -, -, LIN1 */
  PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, /* 36 - 38: DSPI0 */
  PIN_MISO_CONFIG, PIN_ALT3_CONFIG, PIN_DISABLED, /* 39 - 41: MISO0, CG_N_CS_MON, - */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 42 - 44 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 45 - 47 */
  PIN_GPO_DEFAULT_CONFIG, PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, /* 48 - 50: LED, LED, - */
  PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, PIN_ALT1_CONFIG, /* 51 - 53: LED,-, CS3 */
  PIN_ALT1_CONFIG, PIN_DISABLED, PIN_GPO_DEFAULT_CONFIG, /* 54 - 56: CS2, -,-,  */
  PIN_ALT2_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 57 - 59: LIN1,-,- */
  PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 60 - 62: LIN1,-,- */
  PIN_DISABLED, PIN_ANALOG_CONFIG, PIN_DISABLED, /* 63 - 65: -,-,- */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 66 - 68: -, -,- */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 69 - 71 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 72 - 74 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 75 - 77 */
  PIN_DISABLED, PIN_DISABLED, PIN_GPO_DEFAULT_CONFIG, /* 78 - 80: -,-,DEBUG */
  PIN_GPO_DEFAULT_CONFIG, PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, /* 81 - 83: DEBUG, DEBUG */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 84 - 86 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 87 - 89 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 90 - 92 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 93 - 95 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 96 - 100*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 99 - 101*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 102- 104*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 105- 107*/
#endif
#ifdef USE_ARD2_V2
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_PROGRAM, /* 0  -  2: CAN_EN, CAN_STDBY, ABS0 */
  PIN_PROGRAM, PIN_PROGRAM, PIN_GPIO_DEFAULT_CONFIG, /* 3  -  5: ABS2, FAB, N_SYNC */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 6  -  8: EN_FL, DIS_AHP, DIS_ALP */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, /* 9  - 11 CFG1 LIN_ENABLE CFG2 */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_DISABLED, /* 12 - 14 CFG3, CFG4, N_POR */
  PIN_GPIO_DEFAULT_CONFIG, PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 15 - 17: CG_N_SYS_RES, MCU_CANTX_A, MCU_CANRX_A */
  PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, /* 18 - 20: MCU_LINTX_A, MCU_LINRX_A1, NC */
  PIN_DISABLED, PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 21 - 23: NC CLKOUT MCU_LINRX_A2 */
  PIN_DISABLED, PIN_ANALOG_CONFIG, PIN_ANALOG_CONFIG, /* 24 - 26: TP MCU_AN11 AOUT */
  PIN_ANALOG_CONFIG, PIN_ANALOG_CONFIG, PIN_ANALOG_CONFIG, /* 27 - 29 MCU_AN13, MCU_AN14, MCU_AN0 */
  PIN_GPI_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, /* 30 - 32 ARM_X, ARM_Y, TP */
  PIN_DISABLED, PIN_DISABLED, PIN_GPIO_DEFAULT_CONFIG, /* 33 - 35: TP, TP, RES_CONF */
  PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, /* 36 - 38: DSPI0_NCS DSPI0_SCK DSPI0_MOSI */
  PIN_MISO_CONFIG, PIN_ALT3_CONFIG, PIN_GPIO_DEFAULT_CONFIG, /* 39 - 41: DSPI0_MISO CG_N_CS_MON RESET_BGYRO */
  PIN_GPIO_DEFAULT_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 42 - 44 RESET_FSLGYRO MCU_UART_RTS MCU_UART_CTS */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 45 - 47 TP TP TP */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, /* 48 - 50: LED1 LED2 LED3 */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_ALT2_CONFIG, /* 51 - 53: LED4 LED5 MCU_FCU0 */
  PIN_ALT1_CONFIG, PIN_ALT2_CONFIG, PIN_ALT3_CONFIG, /* 54 - 56: N_CSGYRO MCU_FCU1 N_CSACC */
  PIN_ALT2_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 57 - 59: MCU_UART_TXD, TP TP */
  PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 60 - 62: MCU_UART_RXD TP TP */
  PIN_ANALOG_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 63 - 65: MCU_AN4 CAN_NERR TP */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 66 - 68: TP NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 69 - 71: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 72 - 74: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 75 - 77: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_GPO_DEFAULT_CONFIG, /* 78 - 80: NC, NCC ,144 Package from here on: DEBUG */
  PIN_GPO_DEFAULT_CONFIG, PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, /* 81 - 83: DEBUG, DEBUG */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 84 - 86 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 87 - 89 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 90 - 92 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 93 - 95 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 96 - 100*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 99 - 101*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 102- 104*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 105- 107*/
#endif
#ifdef USE_ARD2_V3
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_PROGRAM, /* 0  -  2: CAN_EN, CAN_STDBY, ABS0 */
  PIN_PROGRAM, PIN_PROGRAM, PIN_GPIO_DEFAULT_CONFIG, /* 3  -  5: ABS2, FAB, N_SYNC */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, /* 6  -  8: EN_FL, RES_CONF, RES_GYRO_FSL */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 9  - 11 RES_GYRO_B CFG1 CFG2 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 12 - 14 - - -  */
  PIN_GPIO_DEFAULT_CONFIG, PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, /* 15 - 17: CG_N_SYS_RES, MCU_CANTX_A, MCU_CANRX_A */
  PIN_ALT1_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, /* 18 - 20: MCU_LINTX_A, MCU_LINRX_A, NC */
  PIN_DISABLED, PIN_ALT1_CONFIG, PIN_DISABLED, /* 21 - 23: NC CLKOUT  NC */
  PIN_DISABLED, PIN_DISABLED, PIN_ANALOG_CONFIG, /* 24 - 26: NC NC AOUT */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED,      /* 27 - 29 NC, NC, NC */
  PIN_GPI_DEFAULT_CONFIG, PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, /* 30 - 32 DIS_AHP, DIS_ALP, NC */
  PIN_DISABLED, PIN_DISABLED, PIN_ALT1_CONFIG, /* 33 - 35: NC, NC, N_CS_GYRO_FSL */
  PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, PIN_ALT1_CONFIG, /* 36 - 38: DSPI0_NCS DSPI0_SCK DSPI0_MOSI */
  PIN_MISO_CONFIG, PIN_ALT3_CONFIG, PIN_DISABLED, /* 39 - 41: DSPI0_MISO CG_N_CS_MON NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 42 - 44 NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 45 - 47 NC NC NC */
  PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, PIN_GPIO_DEFAULT_CONFIG, /* 48 - 50: LED1 LED2 LED3 */
  PIN_GPIO_DEFAULT_CONFIG, PIN_DISABLED, PIN_ALT2_CONFIG, /* 51 - 53: LED4 NC MCU_FCU0 */
  PIN_ALT1_CONFIG, PIN_ALT3_CONFIG, PIN_ALT3_CONFIG, /* 54 - 56: N_CSACC_B N_CS_GYRO_B N_CSACC_FSL */
  PIN_ALT2_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 57 - 59: MCU_UART_TXD, NC NC */
  PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, PIN_DISABLED, /* 60 - 62: MCU_UART_RXD NC NC */
  PIN_DISABLED, PIN_GPI_DEFAULT_CONFIG, PIN_DISABLED, /* 63 - 65: NC CAN_NERR NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 66 - 68: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 69 - 71: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 72 - 74: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 75 - 77: NC NC NC */
  PIN_DISABLED, PIN_DISABLED, PIN_GPO_DEFAULT_CONFIG, /* 78 - 80: NC, NCC ,144 Package from here on: DEBUG */
  PIN_GPO_DEFAULT_CONFIG, PIN_GPO_DEFAULT_CONFIG, PIN_DISABLED, /* 81 - 83: DEBUG, DEBUG */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 84 - 86 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 87 - 89 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 90 - 92 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 93 - 95 */
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 96 - 100*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 99 - 101*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 102- 104*/
  PIN_DISABLED, PIN_DISABLED, PIN_DISABLED, /* 105- 107*/
#endif
};

static const uint8_t cau8DefaultInputPadRouting[] =
{
  /* Pad        Mux Selection  */
  PAD_LIN1_RXD, PAD_SEL1, /* Route the input pad to D[12] */
  PAD_LIN0_RXD, PAD_SEL0  /* Route the input pad to B[3]  */
};

static const uint8_t cau8DefaultOutputPinConfig[] =
{
  /* Format is set by DefaultOutputPin_t */
  PIN_EN_FL, CLEAR, /* Enable Squibs signal to SBC */
  PIN_N_SYS_RES, TRUE, /* Reset pin to SBC */
  PIN_DSPI0_MISO, TRUE /* DSPI0 MISO - pull-up for others */
};

static const uint32_t
    cau32DefaultDSPIPresetConfig[] =
    {
      /* 16-bit 8MHz w 64MHz PLL, 100nsec from CS low to CLK - CG147 */
      (DSPI_CPOL_CLEAR | DSPI_CPHA_SET | DSPI_MSB_FIRST | DSPI_16_BIT
          | DSPI_DBR_CLEAR | DSPI_BRP_0 | DSPI_BR_1 | DSPI0C4 | DSPI_CCSCK_0
          | DSPI_PCSSCK_10), (DSPI_DT_1 | DSPI_PDT_10 | DSPI_PASC_10
          | DSPI_ASC_0),

      /* 16-bit 5.3MHz w 64MHz PLL, 100nsec from CS low to CLK - MMA6800 */
      (DSPI_CPOL_CLEAR | DSPI_CPHA_CLEAR | DSPI_MSB_FIRST | DSPI_16_BIT
          | DSPI_DBR_CLEAR | DSPI_BRP_0 | DSPI_BR_2 | DSPI0C5 | DSPI_CCSCK_0
          | DSPI_PCSSCK_01), (DSPI_DT_2 | DSPI_PDT_10 | DSPI_PASC_01
          | DSPI_ASC_0),
      /* 17-bit 8MHz w 64MHz PLL, 100nsec from CS low to CLK - CG147 */
      /* Part 1*/
      (DSPI_CPOL_CLEAR | DSPI_CPHA_SET | DSPI_MSB_FIRST | DSPI_8_BIT
          | DSPI_DBR_CLEAR | DSPI_BRP_0 | DSPI_BR_2 | DSPI0C6 | DSPI_CCSCK_0
          | DSPI_PCSSCK_10), (DSPI_DT_0 | DSPI_PDT_00 | DSPI_PASC_10
          | DSPI_ASC_0),
      /* 17-bit 8MHz w 64MHz PLL, 100nsec from CS low to CLK - CG147 */
      /* Part 2*/
      (DSPI_CPOL_CLEAR | DSPI_CPHA_SET | DSPI_MSB_FIRST | DSPI_9_BIT
          | DSPI_DBR_CLEAR | DSPI_BRP_0 | DSPI_BR_2 | DSPI0C7 | DSPI_CCSCK_0
          | DSPI_PCSSCK_10), (DSPI_DT_1 | DSPI_PDT_10 | DSPI_PASC_10
          | DSPI_ASC_0) };

static const uint32_t
    cau32DefaultDSPIConfig[] =
    {
      /* DSPI0 */
      (DSPI_ENABLE | DSPI_IS_MASTER | DSPI_CONT_CLK_DIS | DSPI_TX_FIFO_EN
          | DSPI_RX_FIFO_EN | DSPI_TX_ISR_EN | DSPI_TX_DMA_DIS | DSPI_RX_ISR_EN
          | DSPI_RX_DMA_DIS | DSPI_CS0_INVERT_EN | DSPI_CS1_INVERT_EN
          | DSPI_CS2_INVERT_EN | DSPI_CS3_INVERT_EN | DSPI_CS4_INVERT_EN
          | DSPI_CS5_INVERT_EN | DSPI_CS6_INVERT_EN | DSPI_CS7_INVERT_EN
          | DSPI_MODIFIED_TIME_DIS | DSPI0C0),

      /* Others */
      (DSPI_DISABLE | DSPI1C0), (DSPI_DISABLE | DSPI2C0), (DSPI_DISABLE
          | DSPI3C0) };

static const uint8_t cau8DMAMuxConfig[] =
{
  /* Order specifies channel. We start with Ch0 */
  (DMA_MUX_ENABLED | DMA_TRIGGER_ENABLED | DMA_SOURCE_DSPI0_TX), /* CH0  */
  (DMA_MUX_ENABLED | DMA_TRIGGER_DISABLED | DMA_SOURCE_DSPI0_RX), /* CH1  */
  (DMA_MUX_ENABLED | DMA_TRIGGER_DISABLED | DMA_SOURCE_ADC0), /* CH2  */
  (DMA_MUX_ENABLED | DMA_TRIGGER_DISABLED | DMA_SOURCE_ETIMER0_CH0), /* CH3  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI1_TX), /* CH4  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI1_RX), /* CH5  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI2_TX), /* CH6  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI2_RX), /* CH7  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI3_TX), /* CH8  */
  (DMA_MUX_ENABLED | DMA_SOURCE_DSPI3_RX), /* CH9  */
  (DMA_MUX_ENABLED | DMA_SOURCE_ETIMER0_CH1), /* CH10 */
  (DMA_MUX_ENABLED | DMA_SOURCE_ETIMER1_CH0), /* CH11 */
  (DMA_MUX_ENABLED | DMA_SOURCE_ETIMER1_CH1), /* CH12 */
  (DMA_MUX_ENABLED | DMA_SOURCE_ALWAYS), /* CH13 */
  (DMA_MUX_ENABLED | DMA_SOURCE_ALWAYS), /* CH14 */
  (DMA_MUX_ENABLED | DMA_SOURCE_ALWAYS), /* CH15 */
};

static const uint32_t cau32DefaultLINUARTConfig[] =
{
#ifdef USE_GENERIC_EVB_BOARD
#ifdef USE_FREEMASTER
  /* Config for 56,200bps @ 64MHz */
  (LIN_INSTANCE_0 | LIN_UART_ENABLED | LIN_TX_BUFF_1_BYTES
      | LIN_RX_BUFF_1_BYTES | LIN_NO_PARITY_CHECK | LIN_8_BIT_WORD_SIZE
      | LIN_MANTISSA(69) | LIN_FRACTION(7)),
#else
  /* Config for 927,200bps @ 64MHz */
  (LIN_INSTANCE_0 | LIN_UART_ENABLED | LIN_TX_BUFF_1_BYTES
      | LIN_RX_BUFF_1_BYTES | LIN_NO_PARITY_CHECK | LIN_8_BIT_WORD_SIZE
      | LIN_MANTISSA(4) | LIN_FRACTION(5))
#endif
#else
#ifdef USE_FREEMASTER
  /* Config for 57,600bps @ 64MHz */
  (LIN_INSTANCE_1 | LIN_UART_ENABLED | LIN_TX_BUFF_1_BYTES
      | LIN_RX_BUFF_1_BYTES | LIN_NO_PARITY_CHECK | LIN_8_BIT_WORD_SIZE
      | LIN_MANTISSA(69) | LIN_FRACTION(7)),
#else
  /* Config for 927,200bps @ 64MHz */
  (LIN_INSTANCE_1 | LIN_UART_ENABLED | LIN_TX_BUFF_1_BYTES
      | LIN_RX_BUFF_4_BYTES | LIN_NO_PARITY_CHECK | LIN_8_BIT_WORD_SIZE
      | LIN_MANTISSA(4) | LIN_FRACTION(5))
#endif
#endif
    };

static const uint8_t cau8DefaultPLL0Config[] =
{
  /* Config for only one instance */
  PLL_INSTANCE_0, IDF_SETTING_FOR_64MHZ, ODF_SETTING_FOR_64MHZ,
  LDF_SETTING_FOR_64MHZ };

static const uint8_t cau8DefaultPLL1Config[] =
{
  /* Config for only one instance */
  PLL_INSTANCE_1, IDF_SETTING_FOR_16MHZ, ODF_SETTING_FOR_16MHZ,
  LDF_SETTING_FOR_16MHZ };

const uint32_t cau32ADCConfig[] =
{
  /* Instance 0 - Continuous sampling every 17.75 usec */
  (ADC_DATA_CAN_BE_OVERWRITTEN | ADC_DATA_IS_ALIGNED_RIGHT
      | ADC_IS_IN_SCAN_MODE | ADC_CTU_IS_OFF | ADC_AUTOCLOCK_OFF_EN
      | ADC_EO_CTU_CONV_ISR_DIS | ADC_EO_INJ_CHAN_CONV_ISR_DIS
      | ADC_EO_INJ_CHAIN_CONV_ISR_DIS | ADC_EO_CHAN_CONV_ISR_DIS
      | ADC_EO_CHAIN_CONV_ISR_DIS | ADC_DMA_CLEARED_ON_ACK | ADC_DMA_EN
      | ADC_IS_CLOCKING_HALF_SPEED | ADC_PR_LSB_NO_ROUNDING
      | ADC_LOW_SPEED_CONFIG),
  /* Instance 1 - Continuous sampling every 17.75 usec */
  (ADC_DATA_CAN_BE_OVERWRITTEN | ADC_DATA_IS_ALIGNED_RIGHT
      | ADC_IS_IN_SCAN_MODE | ADC_CTU_IS_OFF | ADC_AUTOCLOCK_OFF_EN
      | ADC_EO_CTU_CONV_ISR_DIS | ADC_EO_INJ_CHAN_CONV_ISR_DIS
      | ADC_EO_INJ_CHAIN_CONV_ISR_DIS | ADC_EO_CHAN_CONV_ISR_DIS
      | ADC_EO_CHAIN_CONV_ISR_DIS | ADC_DMA_CLEARED_ON_ACK | ADC_DMA_DIS
      | ADC_IS_CLOCKING_HALF_SPEED | ADC_PR_LSB_NO_ROUNDING
      | ADC_LOW_SPEED_CONFIG) };
const uint32_t cau32FCUConfig[] = 
{
  /* Start with time-out */
  FCU_TIMEOUT(FCU_4MS_TIMEOUT),
  /* Configure which software channels will allow a time-out, which  */
  /* SW channels are on, and which HW channels are on */
  (FCU_TES0_ENABLED | FCU_TES1_ENABLED | FCU_TES2_ENABLED | FCU_TES3_ENABLED
  | FCU_TES4_ENABLED | FCU_ESF0_ENABLED | FCU_ESF1_ENABLED | FCU_ESF2_ENABLED
  | FCU_ESF3_ENABLED | FCU_ESF4_ENABLED | 
  FCU_ENABLE_CH(FCU_CORE_CHECKSTOP_MODE_ENTERED | FCU_CORE_RESET | 
                FCU_LOSS_OF_XTAL | FCU_LOSS_OF_PLL0_LOCK | 
                FCU_FREQ0_OUT_OF_RANGE | FCU_LOSS_OF_PLL1_LOCK | 
                FCU_FREQ1_OUT_OF_RANGE | FCU_FLASH_FATAL_ERROR | 
                FCU_WATCHDOG_RESET | FCU_JTAG_RESET | FCU_POWER_COMPARATOR_ERROR 
                | FCU_LVD_4_5 | FCU_LVD_2_7_VREG | FCU_LVD_2_7_FLASH | 
                FCU_LVD_2_7_I_0 | FCU_LVD_1_2_DIG)),
  /* Configure which HW channels will accept a time-out */
  (FCU_TIMEOUT_CH(FCU_CORE_CHECKSTOP_MODE_ENTERED |  
                FCU_LOSS_OF_XTAL | FCU_LOSS_OF_PLL0_LOCK | 
                FCU_FREQ0_OUT_OF_RANGE | FCU_LOSS_OF_PLL1_LOCK | 
                FCU_FREQ1_OUT_OF_RANGE | FCU_FLASH_FATAL_ERROR | 
                FCU_POWER_COMPARATOR_ERROR 
                | FCU_LVD_4_5 | FCU_LVD_2_7_VREG | FCU_LVD_2_7_FLASH | 
                FCU_LVD_2_7_I_0 | FCU_LVD_1_2_DIG) | FCU_NO_TEST_MODE | 
                FCU_OUTPUT0_INV_POL | FCU_OUTPUT_IS_TIME_SWITCH | 
                FCU_OUTPUT_FREQ(7u))              
};
/*
 ******************************************************************************
 * Globals
 ******************************************************************************
 */

/*
 ******************************************************************************
 * u8fnMCUInit
 ******************************************************************************
 */
uint8_t u8fnMCUInit(void)
{
  uint8_t u8Status;
  uint16_t u16Counter;
  
  u8Status = TRUE;
  
  /* Launch Fault Collector Unit right away */
  vfnLaunchFCU();
  
  /* Configure pins as they should be */
  vfnConfigDefaultPinBehavior((uint16_t*)&cau16DefaultPinConfig, 0,
                              PIN_CONFIG_REGISTER_MAX);
  
  /* Configure default output pin levels */
  vfnOutputPinInit();
  
  /* Route input pads to the correct modules */
  vfnInputPadInit();
  
  /* Enable the appropriate interrupts in the system */
  vfnInitInterrupts();
  
  /* Do the same with peripherals */
  u8Status = u8fnInitPeripherals();
  
  if(CLEAR == u8Status)
  {
    /* Load Operation modes into the configuration register */
    u8Status = u8fnInitDefaultOpModes();
    if(CLEAR == u8Status)
    {
      /* Configure Watchdog */
      u8Status = (uint8_t)u16fnConfigSoftwareWatchDog(&tWatchDogConfig);
      
      if((SWT_SOFT_LOCKED == u8Status) || (SWT_UNLOCKED == u8Status))
      {
        /* Configure the PLL for 64MHz operation */

        /* Then configure both PLLs */
        u8Status = u8fnClockPLLConfig(cau8DefaultPLL0Config[CLEAR],
                                      cau8DefaultPLL0Config[1u],
                                      cau8DefaultPLL0Config[2u],
                                      cau8DefaultPLL0Config[3u]);
        u8Status |= u8fnClockPLLConfig(cau8DefaultPLL1Config[CLEAR],
                                       cau8DefaultPLL1Config[1u],
                                       cau8DefaultPLL1Config[2u],
                                       cau8DefaultPLL1Config[3u]);
        if(u8Status == CLEAR)
        {
          
          /* Now jump to 64MHz operation */
          for(u16Counter = CLEAR; u16Counter < 0x10; u16Counter++)
          {
            u8Status = u8fnSwitchOpModes(RUN3_MODE);
            if(u8Status)
            {
              vfnClockClearPLLFlag(PLL_INSTANCE_0);
              vfnClockClearPLLFlag(PLL_INSTANCE_1);
            }
            else
            {
              /* We're good */
              break;
            }
          }
          /* If all is good, configure defaults for SPI, SCI */
          if(CLEAR == u8Status)
          {
            vfnInitDSPI();
            vfnInitSCI();
            vfnInitADC();
            EDMA.CR.B.ERCA = TRUE;
          }
          else
          {
            u8Status = RUN_MODE_NOT_STARTED;
          }
        }
        else
        {
          u8Status = PLL_ERROR;
        }
      }
      else
      {
        u8Status = SWT_NOT_INITIALIZED;
      }
    }
    else
    {
      u8Status = DEFAULT_OPERATION_MODES_NOT_LOADED;
    }
  }
  else
  {
    u8Status = PERIPHERALS_NOT_INITIALIZED;
  }
  
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnInitPeripherals
 ******************************************************************************
 */
uint8_t u8fnInitPeripherals(void)
{
  uint8_t u8Status;
  uint8_t u8PeripheralIndex;
  uint8_t u8PeripheralPreset;
  uint8_t u8Counter;
  
  /* Initialize Peripherals                                                  */
  /* First, we must tell the core what power-mode presets                    */
  /* we are going to allow                                                   */
  u8Status = u8fnInitDefaultPeripheralPresets();
  
  /* If all goes well, associate the given peripherals to a preset           */
  if(CLEAR == u8Status)
  {
    for(u8Counter = N_ELEMENTS(au16PeripheralConfig); u8Counter > CLEAR; u8Counter--)
    {
      u8PeripheralIndex = (uint8_t)(au16PeripheralConfig[u8Counter]
          >> BITS_IN_BYTE);
      u8PeripheralPreset = (uint8_t)(au16PeripheralConfig[u8Counter]);
      u8Status |= u8fnConfigPeripheralForMCUModePreset(u8PeripheralIndex,
          u8PeripheralPreset);
    }
  }
  else
  {
    /* Terminate - we need to figure out how to raise an exception */
  }
  return (u8Status);
}
/*
 ******************************************************************************
 * vfnInitInterrupts
 ******************************************************************************
 */
void vfnInitInterrupts(void)
{
  /* Declare local variables */
  uint8_t u8Counter;
  
  /* Init local variables */
  u8Counter = CLEAR;
  
  /* Configure the core (the IVOR) to its standard configuration where       */
  /* interrupts are handled by the INTC peripheral connected to IVOR 4.      */
  EXCEP_InitExceptionHandlers();
  INTC_InitINTCInterrupts();
  
  /* First, set the INTC module's priority to the lowest setting */
  /* This is necessary to allow other interrupts to occur        */
  INTC.CPR.B.PRI = ISR_INTC_PRIORITY;
  
  /* Next, install all interrupts */
  for(u8Counter = N_ELEMENTS(tISRConfig); u8Counter > CLEAR; u8Counter--)
  {
    INTC_InstallINTCInterruptHandler(tISRConfig[u8Counter - 1u].pFn,
        tISRConfig[u8Counter - 1u].u16ISRVector,
        tISRConfig[u8Counter - 1u].u8Priority);
  }
  
  return;
}
/*
 ******************************************************************************
 * vfnInitDSPI
 ******************************************************************************
 */
void vfnInitDSPI(void)
{
  /* Declare local variables */
  uint8_t u8Counter;
  uint8_t u8MaxCount;
  
  /* Init local variables */
  u8Counter = CLEAR;
  
  /* Configure DSPI instances, starting with their Presets */
  if((N_DSPI_INSTANCES * N_DSPI_PRESETS)
      < (N_ELEMENTS(cau32DefaultDSPIPresetConfig) / 2u))
  {
    u8MaxCount = (uint8_t)(N_DSPI_INSTANCES * N_DSPI_PRESETS);
  }
  else
  {
    u8MaxCount = (N_ELEMENTS(cau32DefaultDSPIPresetConfig));
  }

  for(u8Counter = CLEAR; u8Counter < u8MaxCount; u8Counter += 2u)
  {
    (void)u8fnConfigDSPIPreset(
        (const DSPIPresetConfig_t*)&(cau32DefaultDSPIPresetConfig[u8Counter]));
  }

  /* Next, configure the general settings of all DSPI units */
  if(N_DSPI_INSTANCES < N_ELEMENTS(cau32DefaultDSPIConfig))
  {
    u8MaxCount = N_DSPI_INSTANCES;
  }
  else
  {
    u8MaxCount = N_ELEMENTS(cau32DefaultDSPIConfig);
  }
  for(u8Counter = CLEAR; u8Counter < u8MaxCount; u8Counter++)
  {
    (void)u8fnConfigDSPIGeneral((const DSPIConfig_t*)
        &(cau32DefaultDSPIConfig[u8Counter]));
  }
  return;
}
/*
 ******************************************************************************
 * vfnInitADC
 ******************************************************************************
 */
void vfnInitADC(void)
{
  ADCChConfig_t tMyADCConfig;
  uint8_t u8Status;
  uint8_t u8Counter;
  uint16_t u16Dummy;
  u8Status = CLEAR;
  u8Counter = CLEAR;
  
  /* Load main configuration - SCAN mode is a given */
  for(; u8Counter < ADC_NO_MODULES; u8Counter++)
  {
    u8Status= u8fnADCConfig(u8Counter,
        (ADCConfig_t*)&(cau32ADCConfig[u8Counter]));
  }
  
  /* Configure first instance (ADC0) for Aout readings */
  tMyADCConfig.P.ChDMAEn = TRUE;
  tMyADCConfig.P.ChIsrEn = CLEAR;
  tMyADCConfig.P.Channel = ADC_TO_AOUT_CH;
  tMyADCConfig.P.DMACh = ADC0_DMA_CH;
  tMyADCConfig.P.Instance = 0u;
  
  u8Status = u8fnADCChannelConfig((const ADCChConfig_t*)&tMyADCConfig, 
                                    (uint16_t*)&u16Dummy);
  /* Gear-up! */
  u8Status = u8fnADCNormalConversionEnable(0, TRUE);
  
  return;
}
/*
 ******************************************************************************
 * vfnInitSCI
 ******************************************************************************
 */
void vfnInitSCI(void)
{
  /* Declare local variables */
  uint8_t u8Counter;
  uint8_t u8MaxCount;
  
  /* Init local variables */
  u8Counter = CLEAR;
  
  /* Configure DSPI instances, starting with their Presets */
  if(N_LIN_INSTANCES >= N_ELEMENTS(cau32DefaultLINUARTConfig))
  {
    u8MaxCount = N_ELEMENTS(cau32DefaultLINUARTConfig);
  }
  else
  {
    u8MaxCount = (uint8_t)(N_LIN_INSTANCES);
  }

  for(u8Counter = CLEAR; u8Counter < u8MaxCount; u8Counter++)
  {
    (void)u8fnConfigLINUARTGeneral((const LINUARTConfig_t*)
        &(cau32DefaultLINUARTConfig[u8Counter]));
  }
  
  return;
}
/*
 ******************************************************************************
 * vfnOutputPinInit
 ******************************************************************************
 */
void vfnOutputPinInit(void)
{
  uint8_t u8Counter;
  for(u8Counter = CLEAR; u8Counter < N_ELEMENTS(cau8DefaultOutputPinConfig); u8Counter
      += 3u)
  {
    vfnToggleOutputPin(cau8DefaultOutputPinConfig[u8Counter],
        cau8DefaultOutputPinConfig[u8Counter + 1u],
        cau8DefaultOutputPinConfig[u8Counter + 2u]);
  }
  return;
}
/*
 ******************************************************************************
 * vfnInputPadInit
 ******************************************************************************
 */
void vfnInputPadInit(void)
{
  uint8_t u8Counter;
  for(u8Counter = CLEAR; u8Counter < N_ELEMENTS(cau8DefaultInputPadRouting); u8Counter
      += 2u)
  {
    (void)u8fnRouteInputPad(cau8DefaultInputPadRouting[u8Counter],
        cau8DefaultInputPadRouting[u8Counter + 1u]);
  }
  return;
}
/*
 ******************************************************************************
 * u8fnInitDMAMux
 ******************************************************************************
 */
void vfnInitDMAMux(uint8_t* pu8DMAMuxSettings, uint8_t u8Size)
{
  /* Copy the DMA MUX configuration table into the right place */
  for(; u8Size > CLEAR; u8Size--)
  {
    DMAMUX.CHCONFIG[u8Size - 1u].R = *pu8DMAMuxSettings;
    pu8DMAMuxSettings++;
  };
  
  return;
}
/*
 ******************************************************************************
 * u8fnDelayMSec
 ******************************************************************************
 */
uint8_t u8fnDelay(const uint32_t cu32TimeBase, uint16_t u16Cycles)
{
  /* Declare local variables */
  uint8_t u8Status;
  
  /* Configure Channel */
  u8Status = u8fnPITConfig(PIT_CH_DELAY, cu32TimeBase, CLEAR);
  
  if(CLEAR == u8Status)
  {
    /* Start the counter */
    vfnPITStart(PIT_CH_DELAY, TRUE);
    
    /* Wait for if to expire */
    for(; u16Cycles > CLEAR; u16Cycles--)
    {
      if(1u == u16Cycles)
      {
        /* If this is the last iteration, stop the counter */
        u8Status |= u8fnPITWaitByPoll(PIT_CH_DELAY, CLEAR);
      }
      else
      {
        /* Else, restart the PIT counter as soon as we're done */
        u8Status |= u8fnPITWaitByPoll(PIT_CH_DELAY, TRUE);
      } /* End ELSE */
    }
    /* End FOR */

    if(CLEAR == u8Status)
    {
      /* Nothing, we're done */
    }
    else
    {
      u8Status = PIT_TIMER_NOT_RUNNING;
    }
  } /* End If u8Status = CLEAR */
  else
  {
    u8Status = PIT_SELECTED_CH_DOESNT_EXIST;
  }
  
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnRawADCToDegreesCelsius
 ******************************************************************************
 */
uint8_t u8fnRawADCToDegreesCelsius(const uint16_t u16RawCounts)
{
  int32_t i32Degrees;
  uint8_t u8Degrees;
  
  /* Remove Offset */
  i32Degrees = (int32_t)((ADC_TEMP_OFFSET_CTS) - u16RawCounts);
  i32Degrees *= ADC_SENSITIVITY;
  u8Degrees = (uint8_t)(40u + (i32Degrees / ADC_TEMP_SENSITIVITY_PER_DEG));
  
  return (u8Degrees);
}
/*
 ******************************************************************************
 * u8fnRawADCToOutput
 ******************************************************************************
 */
uint8_t u8fnRawADCToOutput(const uint16_t u16RawCounts)
{
  int32_t i32Voltage;
  uint8_t u8Voltage;
  
  i32Voltage = u16RawCounts * (ADC_SENSITIVITY);
  
  u8Voltage = (uint8_t)(i32Voltage / 100000);
  
  return (u8Voltage);
}
/*
 ******************************************************************************
 * vfnLaunchFCU
 ******************************************************************************
 */
void vfnLaunchFCU(void)
{
  uint8_t u8Status;
  u8Status = u8fnFCUInit((FCUConfig_t*)&cau32FCUConfig);
  
  if(CLEAR == u8Status)
  {
    (void)u8fnFCUEnableConfig();
  }
  else
  {
    /* We're not doing anything */
  }
  return;
}
/*
 ******************************************************************************
 * u8fnInitPostalService
 ******************************************************************************
 */
uint8_t u8fnInitPostalService(const uint8_t cu8Enable)
{
  uint8_t u8Status;
  
  u8Status = CLEAR;
  
  if(CLEAR != cu8Enable)
  {
    /* First initialize both inbox and outboxes for DSPI. */
    vfnMailboxInit();
    
    /* Followed by the init of both inbox and outboxes with the delivery system*/
    /* Outbox will be used to send messages via the SPI using */
    u8Status
        |= u8fnMailDeliveryOfOutboxInit(
                                        (uint32_t*)&(gau32DSPIOutbox[OUTBOX_ACTIVE_OUTBOX_IS_1]),
                                        (uint32_t*)&(DSPI_0.PUSHR),
                                        MAILDELIVERY_OUTBOX1_DMA_CH);
    u8Status
        |= u8fnMailDeliveryOfOutboxInit(
                                        (uint32_t*)&(gau32DSPIOutbox[OUTBOX_ACTIVE_OUTBOX_IS_2]),
                                        (uint32_t*)&(DSPI_0.PUSHR),
                                        MAILDELIVERY_OUTBOX2_DMA_CH);
    u8Status
        |= u8fnMailDeliveryToInboxInit((uint16_t*)((uint32_t)(&(DSPI_0.POPR))
            + 2u));
    
    /* Configure DMA Mux so that it triggers every time we receive SPI data */
    vfnDMAMUXInit(MAILDELIVERY_INBOX1_DMA_CH, DMA_SOURCE_DSPI0_RX, CLEAR, TRUE);
    
  }
  else
  {
    /* Nothing to init really */
  }

  /* Switch to/from Interrupts depending on the value of u8Enable */
  u8Status |= u8fnDSPISwitchIsrMode(DSPI0C0, cu8Enable);
  
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnLauchScheduler
 ******************************************************************************
 */
uint8_t u8fnLaunchScheduler(const uint8_t cu8Enable)
{
  uint8_t u8Status;
  
  u8Status = u8fnSchedConfig(SCHED_TICK_PERIOD, PIT_SCHEDULING_CH, 
                             RESCHED_TICK_PERIOD, PIT_RESCHEDULE_CH);
  
  if(CLEAR == u8Status)
  {
    (void)u8fnSchedEnable(cu8Enable);
  }
  else
  {
    /* Just go */
  }
  
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnTransferADCResults
 ******************************************************************************
 */
void vfnTransferADCResults(uint8_t u8Instance, uint16_t* pu16Destination,
                               uint16_t u16Size)
{
  TCD_t tMyDefaultConfig;
  
  /* Program the dedicated EDMA channel for this operation */
  
  /* Source Address will always be the ADC result */
  tMyDefaultConfig.P.SADDR = (((uint32_t)&ADC_0.CDR[ADC_TO_AOUT_CH].R) + 2u);
  /* Destination address is our output vehicle (DSPI, for example) */
  tMyDefaultConfig.P.DADDR = (uint32_t)pu16Destination;
  /* Modulus is 0 */
  tMyDefaultConfig.P.SMOD = CLEAR;
  tMyDefaultConfig.P.DMOD = CLEAR;
  /* We will transfer 32-bit words */
  tMyDefaultConfig.P.SSIZE = DMA_SIZE_16_BIT;
  tMyDefaultConfig.P.DSIZE = DMA_SIZE_16_BIT;
  tMyDefaultConfig.P.SOFF = 0u; /* Offset per minor loop (in bytes) */
  tMyDefaultConfig.P.DOFF = 2u; /* Destination offset per minor loop */
  tMyDefaultConfig.P.NBYTES = 2u; /* Inner loop transfer count (in bytes) */
  tMyDefaultConfig.P.SLAST = CLEAR;
  tMyDefaultConfig.P.CITERE_LINK = CLEAR;
  tMyDefaultConfig.P.BITERE_LINK = CLEAR;
  tMyDefaultConfig.P.CITER = u16Size; /* Times we'll execute our minor loop */
  tMyDefaultConfig.P.BITER = u16Size; /* Memory for the loop */
  tMyDefaultConfig.P.D_REQ = TRUE; /* Clear HW Start requests after major loop is done */
  
  tMyDefaultConfig.P.DLAST_SGA = -((int32_t)u16Size * 2u); /* Last destination offset */
  tMyDefaultConfig.P.MAJORLINKCH = CLEAR;
  tMyDefaultConfig.P.BWC = DMA_BWC_4_CYCLE_STALL;
  tMyDefaultConfig.P.MAJORE_LINK = CLEAR; /* Disable ch2ch linking */
  tMyDefaultConfig.P.E_SG = CLEAR;
  
  tMyDefaultConfig.P.INT_HALF = CLEAR;
  tMyDefaultConfig.P.INT_MAJ = CLEAR;
  tMyDefaultConfig.P.START = CLEAR;
  
  vfnDMAConfig(&tMyDefaultConfig, ADC0_DMA_CH + u8Instance);
  
  /* Route it adequately */
  vfnDMAMUXInit(ADC0_DMA_CH + u8Instance, DMA_SOURCE_ADC0 + u8Instance, 
                CLEAR, TRUE);
  
  /* Enable HW signaling to channel 8 (or 9) */
  EDMA.SERQR.R = (uint8_t)ADC0_DMA_CH + u8Instance;
  
  return;
}
/*
 ******************************************************************************
 * vfnEnterLowPowerMode
 ******************************************************************************
 */
void vfnEnterLowPowerMode(void)
{
  (void)u8fnSwitchOpModes(STOP0_MODE);
  return;
}
/*
 ******************************************************************************
 * vfnDefaultISR
 ******************************************************************************
 */
static void vfnDefaultISR(void)
{
  return;
}
/*
 ******************************************************************************
 *
 *  End of file.
 *
 ******************************************************************************
 */